Intel’s 386 CPU is notable for being its first x86 CPU to make use of so-called normal cell logic, which swapped the taping out of particular person transistors with wiring up standardized purposeful blocks. This fashion you solely need to outline particular gate sorts, latches and so forth, after which an outline of those blocks could be parsed and assembled by a pc into components of a functioning application-specific built-in circuit (ASIC). That is normal process at the moment with register-transfer degree (RTL) descriptions being positioned and routed for both an FPGA or ASIC goal.
That stated, [Ken Shirriff] discovered a number of surprises within the 386’s die, a few of which threw him for a loop. An intrinsic a part of normal cells is that they’re organized in rows and columns, with information channels between them the place sign paths could be routed. The shock right here was discovering a stray PMOS transistor proper within the midst of 1 such information channel, which [Ken] speculates is a bug repair for one of many multiplexers. Again then regenerating the format would have been somewhat costly, so a handbook repair like this could have made excellent sense. Think about it a bodge wire for ASICs.
One other oddity was an inverter that wasn’t an inverter, which turned out to be simply two separate NMOS and PMOS transistors that appeared to be wired up as an inverter, however appeared to really there as a part of a multiplexer. Because it seems, it’s laborious to find out typically whether or not transistors are linked in these die teardowns, or whether or not there’s a spot between them, or simply an artifact of the sunshine or the etching course of.
